1. Technological Field
This technical disclosure pertains generally to a sense amplifier and writing circuit for high-speed MRAM, and more particularly to a high-speed and low-power pre-read and write sense amplifier (PWSA) for high-speed MRAM.
2. Background Discussion
Magnetoresistive random access memory (MRAM) is a promising next-generation emerging memory technology that can provide non-volatility and low write energy with fast read and write speeds, long retention times (above 10 years) and endurances greater than 1016 program cycles. Magnetic tunnel junctions (MTJs) have become basic building blocks of MRAM, where relatively high tunneling magnetoresistance (TMR) ratios achieve two distinguishable resistive states, generally referred to as parallel (P) and anti-parallel (AP) states.
Recently, there has been increasing interest in ultrafast precessional (i.e., resonant) switching of MTJs, using both current (via the spin transfer torque, STT effect), and voltage (via the voltage-controlled magnetic anisotropy, VCMA effect) pulses. In STT devices, precessional switching is achieved by incorporating an orthogonal combination of free and fixed layers into the device, where the large spin torque from the perpendicular fixed layer sets the free layer magnetization into a precessional motion, resulting in resonant switching. Alternatively, in the case of voltage controlled MTJ devices, the VCMA effect originates from the fact that the interface of oxides with metallic ferromagnets (e.g., CoFeB|MgO) shows a large perpendicular magnetic anisotropy (PMA), which is sensitive to voltages applied across the dielectric layer. This effect is caused by the electric field induced modulation of the relative occupancy of d orbitals at the interface. Since the PMA is modulated due to the applied voltage, a torque is exerted on the free layer magnetization, setting it into a precessional motion, thereby causing switching.
Precessional switching offers the advantages of very high speed (down to approximately 100 ps) and low switching energy (down to approximately 1 fJ/bit using the VCMA effect and about 100 fJ/bit using the STT effect). However, it also presents a number of new challenges. The first one is difficulty in determining the switching direction. In principle, the state of the magnetic bit is always reversed during resonant switching, irrespective of its initial state. Despite this issue, precessional switching only requires one pulse shape (amplitude and length) to write both the parallel (P) and antiparallel (AP) data states. This greatly simplifies the pulse generation circuitry and provides more symmetric writes (which is better for device reliability and/or endurance).
Due to its high density, a one transistor and one magnetic tunnel junction (1 T-1 MTJ) cell is the most widely used bit-cell for MRAM. However, the available sensing margin is small due to the low tunneling magnetoresistance (TMR) of the 1T-1 MTJ memory architecture: i.e., the series bit line (BL) resistance decreases the resistance ratio of MTJs seen by the sensing circuitry. Furthermore, since a bias across the MTJ reduces its resistance, especially the resistance in the anti-parallel state, the TMR is diminished compared to the case of zero biased. This reduction further lowers the sensing margin, causing an increased possibility of an erroneous read.
Accordingly, a need exists for circuitry for performing ultrafast precessional switching of MTJs while providing increased sensing margins, with lowered error rates. The present disclosure achieved a high sensing margin while overcoming shortcomings of previous MTJ sense amplifier and writing circuits.